CEE'96 PRELIMINARY PROGRAMME


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ALL TITLES ARE BASED ON ACCEPTED ABSTRACT TITLES


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CEE'96 Conference at a Quick Glance


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Tuesday 9 April

18.00 - 19.00 Get-together party


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Wednesday 10 April

09.30 - 09.45 Welcome and General Introduction

09.45 - 10.30 Keynote Presentation

Available IT & Tools for Concurrent Engineering and Related RTD ESPRIT Projects. Marc Pallot, ESoCE, France


10.30 - 11.00 Coffee Break


11.00 - 12.30 Parallel Sessions


Management

Team_Working Organisation in Software Project M.Zellouf, B.Prevot and R.Aubry, INSA de Lyon, Villeurbanne Cedex, France

A Process Oriented Life Cycle Model for Project Management. Benina Schweyer and Alain Haurat, LLP/CESALP, Annecy Cedex, France.

Management Organisation on The Frame - Structure of Object. N.Perovskaja, State Academy of AIM, St.Petersburg, Russia.


Applications

Control and Optimization of the Production Process of a Company for Electrical Components. Domenico Falcone and Fabio De Felice, Universita degli Studi di Cassino, Cassino, Italy.

An Intelligent Computer Aided Process Control Approach to Design Building Installations. W.Zeiler, Kropman BV, Rijswijk, The Netherlands.

FINE: Implementation of a Distributed Telematics Environment for Clinical Engineers. P.Balaouras, C.Bouras, L.Chadellis, D.Fotakis, V.Kapoulas, N.Palikarakis, R.Sandaltzopoulos, P.Spirakis and A.Tatkis, University of Patras, Patras, Greece.


12.30 - 13.30 Lunch


13.30 - 15.30 Parallel Sessions


Core Design & Management

An Integrated Approach to the Solution of Interdependent Problems in The Management and Control of Design in Electronics Engineering. A.P.Jagodzinski, P.F.Culverhouse and R.Parsons, University of Plymouth, Plymouth, United Kingdom.

Concurrent Design of IC-Layout and Technology with CAMBIO-XT. Rainer Brueck and Bernd Reusch, Universitat Dortmund, Dortmund, Germany.

An Object-Oriented Database Framework for a Simulation Model Library. C.H.Lee and R.N.Zobel, University of Manchester, Manchester, United Kingdom.

The Design and Evaluation of a Multithreaded Architecture for the Efficient Execution of Vector Computations. Sung Dae, Pusan National Institute of Technology, Pusan, Republic of Korea


FMS & CE Practice

A Quantitative Analysis of CE Practice in Belgium. Rik Van Landeghem, University of Ghent, Ghent, Belgium.

Supporting Concurrent Engineering in The Age of Teleworking and Job Sharing. David Jenkins, University of Paisley, Paisley, United Kingdom.

Simulational Assessment of a Modular Assembly Facility. G.M.Acaccia, M.Callegari, G.Costetti, R.C.Michelini, R.M.Molfino, A.Paludetto and A.Rossi, University of Genova, Genova, Italy.

A Study on Realizing The Process Reengineering for a Large Joint Venture Company. Lijuan Yu, Fudan University, Shanghai, China.


15.30 - 16.00 Coffee Break


16.00 - 18.00 Parallel Sessions


IT Aspects

Combining JSD Approach Method and Rewrite Logic for The Specification of Information Systems. Mustaphe Kamel Abdi and Mustapha Kamel Rahmouni, University of Oran, Oran, Algeria.

B.A.D.Y.S.: A Blackboard System for Dynamic Scheduling in FMS. M.Mokadem and M.Mehadji, University of Es-Senia, Oran, Algeria.

GENESIS: Generation of Specialized Intelligent Systems. M.Mokadem and M.Mehadji, University of Es-senia, Oran, Algeria.

LDSS: Language for Sysmetrical System Description. Fatihma Zohra Bellounar, Nabila Mokhtari and Mourad Mehadji, University of Wahran, Algeria.


Advanced Computer Techniques

VPLC- A Case-Tool for the Virtual Programming, Simulation and Diagnosis of PLC-Software. D.Spath, M.Lanza and U.Osmers, Technical University Karlsruhe, Karlsruhe, Germany.

Visualization and Simulation Models for Synthetic Environments in Manufacturing. J.Habibi and R.N.Zobel, University of Manchester, Manchester, United Kingdom.

On the Semantics of Object Oriented Databases. Nasreddine Aoumeur, Universite d'Oran, Es-Senia, Algeria.

Can we Design an Optimal Signal Processor by Means of Neural Networks? A.Oletsky, Mohyla Academy National University, Kiev, Ukraine


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Thursday 11 April

09.00 - 10.30 Parallel Sessions

Design Automation

Conceptual Methodological Framework for Process Design Automation. W.Zeiler, Kropman BV, Rijswijk, The Netherlands.

Design Automation of Industrial Processes Using A Material-Energy Model. Marjan Rihar, J.Stefan Institute, Ljubljana, Slovenia.

Concurrent Experimental Design to Manufacturing Processes Design and Optimization. Nikola Sakic, Dalibor Benic and Nenad Drezga, University of Zagreb, Zagreb, Croatia.


Formal Techniques

Formal Specification Techniques for Concurrent Engineering Design Ramzi Guetari and G.Toan Nguyen, INRIA Rhone-Alpes, Grenoble, France.

Control of Discrete Event Systems in the Dioid of Formal Series - Application to an Assembly Line. P.Spacek, A.El Moudni , S.Zerhouni and M.ferney, Ecole Nationale d'Ingenieurs de Belfort, Belfort Technopole, France.

A Max-Plus Algebra Approach in Deadlock Analysis of Fork-Join Queueing Networks. Nikolai K.Krivulin, St.Petersburg State University, St.Petersburg, Russia.


10.30 - 11.00 Coffee Break


11.00 - 12.00 Parallel Sessions


Cost & Effectiveness

Horizontal Bilateral Communications Improved by Extended Classical Approaches. P.Hudson, B.Parkinson and R.Senior, University of Hertfordshire, Hatfield and R.barker and C.Short, Sheffield Hallam University, Sheffield, United Kingdom.

Approaches to Product Life-Cycle Cost estimation in Concurrent Engineering. Hans Joerg Bullinger, Joachim Warschat, Reinhold Bopp and Kai Warner


Micromachining

Integration of Capacity Pressure Sensors in a Standard CMOS Process Flow. R.Catanescu, L.Elbrecht, J.Zacheja and J.Binder, University of Bremen, Bremen, Germany.

LIDO: An Approach to Microstructure Layout and Process Design. Rainer Brueck and Kai Hahn, Universitat Dortmund, Dortmund, Germany.


12.30 - 13.30 Lunch


13.30 - 17.00 Exhibition / Sight Seeing


17.00 - 18.00 Discussion Session


19.00 Conference Dinner


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Friday 12 April

09.00 - 10.30 Parallel Sessions


Tools & Applications

Time to Market Oliver Greenfield, University of Bournemouth, Bournemouth, United Kingdom.

The Use of Multimedia to Aid The Teaching of Concurrent Engineering. P.Hudson, B.Parkinson and R.Senior, University of Hertfordshire, Hatfield and R.barker and C.Short, Sheffield Hallam University, Sheffield, United Kingdom.

Fault Diagnosis in Heterogeneous Complex Systems. Bjorn Schieffer, Universitaet des Saarlandes, Saarbruecken, Germany.


Testing & Testability

Combining Testability Asessment of PCBs with In-Circuit Test Fixture Design. Therese Lawlor-Wright and Charles Gallagher, University of salford, Salford, United Kingdom.

Design of a Hardware Acceleration System for Automatic Test pattern Generation. Nazar A.Zaidi, Intel Corp., Santa Clara and Saghir A.Shaikh and Stephen A.Szygenda, University of Texas at Austin, Austin, USA.

Optimal Statistical Estimates Through Nonhomogeneous Measurements Treatment. Vladimir A.Shikhin, Frederick Institute of Technology, Nicosia, Cyprus and Galina P.Pavluk, Moscow Power Engineering Institute, Moscow, Russia.


10.30 - 11.00 Coffee Break


11.00 - 12.30 Discussion / Technical (commercial) Session


12.30 - 13.30 Lunch


13.30 - 15.30 Parallel Sessions


CE Techniques

Concurrent Prototyping for Software-Based Systems. Juan C.Duenas and Gonzalo Leon, ETSI, Universidad de Madrid, Madrid, Spain.

Language for Specification Combined System in Simulation. Noria Taghezout and Mourad Mehadji, University of Wahran, Algeria.

Some Key Issues in Implementing Concurrent Engineering within SME's. Richard Heppenstall and Alan Lewis, Cardiff Institue of Higher Education, Cardiff, United Kingdom.

An Alternative View of The Pilot Project Process. Alan Fowler, Newcastle University and Peter Worrell, AB-Electrolux Group Technology, Newcastle-upon-Tyne, United Kingdom


Analog Design

Object-Oriented Description of AHDL Models Application to Bondgraph Representation Tudor Niculiu, Anca Manolescu, Daniel Leonescu and Anton Manolescu, Univ."Politehnica" of Bucharest, Romania and Klaus Hoffmann and Manfred Glesner, Technische Hochschule Darmstadt, Darmstadt, Germany.

An Analog Transient Analysis Extension of VHDL for Mixed-Signal Systems. Lun Ye and Hal Carter, University of Cincinnati, Cincinnati, USA.

Analogue IC Layout Synthesis Using Symbolic Floorplans. D.Nalbantis, W.A.J.Waller, L.T.Walczowski and K.Shi, University of Kent, Canterbury, United Kingdom

Object Technology for Analogue VLSI Design. K.Shi, L.T.Walczowski, D.Nalbantis and W.A.J.Waller, University of Kent, Canterbury, United Kingdom


15.30 Close

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info@scs-europe.org Update 05/02/96

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