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Digital
Library of the European Council for Modelling and Simulation |
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Title: |
Atomic
Instruction Translation Towards A Multi-Threaded QEMU |
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Authors: |
Alvise
Rigo, Alexander Spyridakis,
Daniel Raho |
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Published in:
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(2016).ECMS 2016 Proceedings edited
by: Thorsen Claus, Frank Herrmann, Michael Manitz, Oliver Rose, European Council for Modeling and
Simulation. doi:10.7148/2016 ISBN:
978-0-9932440-2-5 30th
European Conference on Modelling and Simulation, Regensburg Germany, May 31st
– June 3rd, 2016 |
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Citation
format: |
Alvise
Rigo, Alexander Spyridakis,
Daniel Raho (2016). Atomic Instruction Translation
Towards A Multi-Threaded QEMU, ECMS 2016 Proceedings edited by: Thorsten
Claus, Frank Herrmann, Michael Manitz, Oliver Rose European
Council for Modeling and Simulation. doi:10.7148/2016-0587 |
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DOI: |
http://dx.doi.org/10.7148/2016-0587 |
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Abstract: |
In the context of system emulation,
the sophistication of the emulator usually grows with the complexity of the
target system model. Particularly, emulating precisely a
certain CPU architecture can introduce many challenges that have to be
properly explored and somehow solved to reach an accurate emulation of the
target system. In this paper we present an
implementation design of ARM atomic instructions for a multi-threaded version
of QEMU (the Quick EMUlator), currently under
development [1]. To prove the correctness and
performance of such an implementation, some tests have been performed showcasing
a high degree of accuracy and fidelity of the emulated instructions. While
this paper does not cover all possible guest architectures that QEMU
supports, the described new approach results in a reliable infrastructure that
eventually can address all target architectures in QEMU. |
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