June 3^rd - 6^th, 2008
Nicosia, Cyprus

Keynote and Tutorial of Geoffrey C. Fox, USA

Keynote
"Multicore Grids and the Data Deluge"

ABSTRACT
Technology advances suggest that the data deluge, network bandwidth and computers performance will continue their exponential increase. Computers will exhibit 64-128 cores in some 5 years. Consequences include a growing importance of data mining and data analysis capabilities that need to perform well on both parallel and distributed Grid systems. Parallelism needs to be extended from cluster to multicore architectures. Grids need to inherit the simplicity and broad support of Web 2.0 including mash-ups, gadgets and clouds. Clouds are virtual clusters forming a Grid that exports a system not a service interface. We look at possible scientific computing execution and programming environments that build on commodity Web 2.0 and multicore software concepts. Perhaps these will get good commercial support and finally allow attractive parallel and Grid software environments.



SPEAKER BIOGRAPHY

Geoffrey C. Fox (8122194643, gcf"at"indiana.edu, http://www.infomall.org).
Professor Fox received a Ph.D. in Theoretical Physics from Cambridge University and is now professor of Computer Science, Informatics, and Physics at Indiana University. He is director of the Community Grids Laboratory of the Pervasive Technology Laboratories at Indiana University. He previously held positions at Caltech, Syracuse University and Florida State University. He has published over 550 papers in physics and computer science and been a major author on four books. Professor Fox has worked in a variety of applied computer science fields with his work on computational physics evolving into contributions to parallel computing and now to Grid and multicore chip systems. He has worked on the computing issues in several application areas - currently focusing on Defense, Earthquake and Ice-sheet Science and Chemical Informatics. He is involved in several projects to enhance the capabilities of Minority Serving Institutions.

Co-authors: Marlon Pierce, Xiaohong Qiu, Huapeng Yuan, Seung-Hee Bae.

Tutorial
"Using Multicore Chips for Scientific Computing"

TUTORIAL DESCRIPTION
In this tutorial we review the status of generally available multicore chips including mainline chips from AMD and Intel as well graphics units from IBM (Cell) and NVIDIA. We discuss programming models and relation of these to those familiar on traditional distributed and shared memory parallel machines. We look at performance issues emphasizing those like memory bandwidth and shared cache usage that are distinct from those that dominate traditional large scale parallel applications. We discuss relation of multicore, cluster and Grid computing and examine role of services in unifying them. Examples from the SALSA project http://www.infomall.org/salsa will be used to illustrate ideas. The application focus will be linear algebra and data mining but other areas such as solution of differential equations will be discussed.

TUTORIAL OUTLINE
· Introduction to Multicore Chips
· Programming Models
· Relation to Other High Performance Distributed and Parallel Machines
· Performance of Multicore Systems
· Relation to Cluster and Grid computing
· Multicore Projects and Applications
· Conclusions on State of the Art and Future Directions
TARGET AUDIENCE
The target audience includes researchers, students, and practitioners who are interested in learning more about multicore design, development and use.

REQUIRED BACKGROUND
Knowledge of computer architecture and organization fundamentals. Knowledge of scientific computing.

TUTORIAL DURATION
The tutorial material will be presented in a 2 to 3-hour session.

 

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